Zero ZT0
This instruction zeroes all bytes of the ZT0 register.
This instruction does not require the PE to be in Streaming SVE mode, and it is expected that this instruction will not experience a significant slowdown due to contention with other PEs that are executing in Streaming SVE mode.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
opc |
if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF);
CheckSMEEnabled(); CheckSMEZT0Enabled(); if IsFeatureImplemented(FEAT_TME) && TSTATE.depth > 0 then FailTransaction(TMFailure_ERR, FALSE); ZT0[512] = Zeros(512);
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2025-03_rel, pseudocode v2025-03_rel ; Build timestamp: 2025-03-21T17:41
Copyright © 2010-2025 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.