The ERRPIDR3 characteristics are:
Provides discovery information about the component.
Implementation of this register is OPTIONAL.
ERRPIDR3 is implemented only as part of a memory-mapped group of error records.
ERRPIDR3 is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | REVAND | CMOD |
Reserved, RES0.
Component minor revision. ERRPIDR2.REVISION and ERRPIDR3.REVAND together form the revision number of the component, with ERRPIDR2.REVISION being the most significant part and ERRPIDR3.REVAND the least significant part. When a component is changed, ERRPIDR2.REVISION or ERRPIDR3.REVAND are increased to ensure that software can differentiate the different revisions of the component. ERRPIDR3.REVAND should be set to 0b0000 when ERRPIDR2.REVISION is increased.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Customer Modified.
Indicates the component has been modified.
A value of 0b0000 means the component is not modified from the original design.
Any other value means the component has been modified in an IMPLEMENTATION DEFINED way.
For any two components with the same Unique Component Identifier:
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | REVISION | CMOD |
Reserved, RES0.
Component revision. When a component is changed, ERRPIDR3.REVISION is increased to ensure that software can differentiate the different revisions of the component.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Customer Modified.
Indicates the component has been modified.
A value of 0b0000 means the component is not modified from the original design.
Any other value means the component has been modified in an IMPLEMENTATION DEFINED way.
For any two components with the same Unique Component Identifier:
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
This section shows the offset of ERRPIDR3 when FEAT_RASSA_4KB_GRP is implemented. If FEAT_RASSA_16KB_GRP or FEAT_RASSA_64KB_GRP is implemented, see 'RAS memory-mapped register views' for the offset of ERRPIDR3.
Component | Offset | Instance |
---|---|---|
RAS | 0xFEC | ERRPIDR3 |
Accesses to this register are RO.
21/03/2025 17:53; 154105dd5041532b480d9ef0c018b8420cbe5c19
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